Numitron · Volume 3

Driving Numitrons

The electrical model of a filament digit, why it can't be multiplexed, and the CD4511 decoder/latch that sources its current directly

The single most important sentence in this volume was written in Vol 1 and is worth repeating before any circuit appears: a Numitron behaves electrically like a string of tiny light bulbs, not like a seven-segment LED. Both look identical — the same figure-eight of segments labelled a through g — and both are addressed the same way by a BCD-to-seven-segment decoder. But under the hood an LED segment is a diode that drops a fixed forward voltage and passes a current you must limit, while a Numitron segment is a resistive tungsten filament that obeys Ohm’s law and glows by incandescence. Every driver decision in this volume falls out of that one difference: it is why a Numitron cannot be multiplexed, why an LED decoder happens to drive it perfectly, why the supply must be sized for nearly an amp, and why a single ordinary diode is enough to dim the whole display.1

This volume builds the driver from the bottom up — first the electrical model of one segment, then the turn-on behaviour, then the architecture that turns six tubes into a clock: six CD4511 decoder/latches, one per tube, addressed through a single shift register so the microcontroller spends only a handful of pins on the entire display.

Figure 1 — 1 — The Numitron drive chain: the PIC presents a digit on a shared 4-bit BCD bus to six CD4511 decoder/latches in parallel, each sourcing seven segment lines into one IV-9 tube; the 74HC16…
Figure 1 — 1 — The Numitron drive chain: the PIC presents a digit on a shared 4-bit BCD bus to six CD4511 decoder/latches in parallel, each sourcing seven segment lines into one IV-9 tube; the 74HC164 shift register supplies one Latch-Enable per tube so only the selected digit updates. Diagram: project original.

3.1 The electrical model of a Numitron segment

Treat one lit segment as a resistor. The IV-9 datasheet and the worked build agree on the operating point: about 5 V across a segment at about 23 mA through it.2 From Ohm’s law the segment’s hot (operating) resistance is

R_seg = V / I = 5 V / 0.023 A ≈ 217 Ω

and the power dissipated in that one filament — the power that becomes heat and the warm amber light — is

P_seg = V × I = 5 V × 0.023 A ≈ 0.115 W = 115 mW

A numeral lights several segments at once. The worst case for a single digit is the figure 8, which lights all seven:

I_digit(8) = 7 × 23 mA = 161 mA
P_digit(8) = 7 × 115 mW ≈ 0.81 W

A typical digit draws less — a 1 lights only two segments (≈46 mA), a 7 lights three (≈69 mA) — but a clock has to be specified for its worst moment, and we will see in Section 3.6 that the worst moment for the whole clock is worse still. The key takeaways for the rest of the volume: each segment is a ~217 Ω load wanting ~23 mA, the load is linear and bidirectional (a filament does not care which way current flows — the polarity-freedom carried forward from Vol 2), and there is no forward-voltage knee and no need for a current-limiting resistor of the kind an LED demands.

Figure 2 — 2 — Single-segment electrical model: a CD4511 CMOS push-pull output (with its driver on-resistance) sources ~23 mA through a ~217 ohm filament at ~5 V (P = 115 mW) to the common return, be…
Figure 2 — 2 — Single-segment electrical model: a CD4511 CMOS push-pull output (with its driver on-resistance) sources ~23 mA through a ~217 ohm filament at ~5 V (P = 115 mW) to the common return, beside the LED equivalent (diode + series current-limit resistor) for contrast. Diagram: project original.

3.2 Cold-versus-hot resistance and the turn-on inrush

The 217 Ω figure is the hot resistance, measured once the filament has reached its glowing operating temperature. Tungsten is a positive-temperature-coefficient conductor: its resistivity climbs with temperature at roughly +0.0045 per °C near room temperature, so a cold filament has substantially lower resistance than a hot one. The familiar consequence in any incandescent lamp is inrush current — at the instant of switch-on the filament is cold and low-resistance, so the initial current spike exceeds the steady-state value, then decays over a few milliseconds as the filament self-heats and its resistance rises to the operating value.

For a full-brightness lamp filament (running near 2700 K) the hot/cold resistance ratio is about 12–15×. A Numitron filament runs cooler and dimmer than a lamp — it glows a soft amber rather than white — so its ratio is smaller. Taking a representative operating temperature of order 1500 K, the linear estimate gives a hot/cold ratio of roughly 5–6×, i.e. a cold resistance of order

R_cold ≈ R_hot / 5 ≈ 217 Ω / 5 ≈ 43 Ω

If the segment were driven from an ideal 5 V source the cold-start peak would be about

I_peak ≈ 5 V / 43 Ω ≈ 116 mA   (decaying to 23 mA within a few ms)

— several times the steady-state current. In a Numitron clock this inrush is real but benign, for two reasons. First, the filament’s thermal mass is tiny, so the spike is brief (milliseconds) and the average is dominated by the steady 23 mA. Second, and elegantly, the CD4511 driver limits it for free. A CMOS output is not an ideal voltage source; it is a push-pull transistor pair with a finite on-resistance. When the cold filament tries to pull a large current, more of the 5 V rail simply drops across the driver’s own output transistor, so the peak is bounded by driver-impedance + cold-filament in series rather than by the cold filament alone. The same finite output impedance that caps the steady current near the part’s rating also tames the inrush — no series resistor, no soft-start, nothing added. The practical lifetime lesson (Vol 9) is that the gentle, self-limited turn-on is one reason Numitrons are rated for >100,000 hours: they are never hit with the unrestrained cold-start surge a mains lamp endures.

3.3 Why you cannot multiplex a Numitron

Vol 1 stated the gotcha; here is the physics in full, because it is the reason the architecture looks the way it does. Multiplexing is the trick that lets a multi-digit LED clock save driver pins: light one digit at a time, very briefly, cycling through all the digits fast enough that persistence of vision in the eye fuses them into a steady display. An LED responds to current essentially instantly — switch it on and it is at full brightness in nanoseconds, switch it off and it is dark just as fast — so a 1-of-6 multiplex with each digit lit 1/6 of the time looks, to the eye, like a continuous display (you compensate by driving each digit harder during its slot).

A filament cannot play this game. It glows because it is hot, and heating and cooling a physical object takes time — the filament has thermal mass and a thermal time constant far longer than the multiplex period. Switch it on and off rapidly at a low duty cycle and it never reaches full operating temperature; it simply settles at a dim, lukewarm equilibrium. As the designer puts it, multiplexing a Numitron “will simply act as a light dimmer.”1 A 1-of-6 multiplex leaves each tube at roughly one-sixth of full brightness — too dim to read — and unlike an LED you cannot buy the brightness back by over-driving during the slot, because slamming six times the current through a cold filament for 1/6 of the time just stresses it without ever getting it hot enough, fast enough, to glow.

The consequence is the central architectural fact of the whole clock: every Numitron digit needs its own continuous, always-on driver. Six digits means six independent drivers, each holding its segments lit steadily between updates. (The contrast inside this very clock is instructive: the ring of 60 LEDs around the tubes is heavily multiplexed — driven one row at a time by a CD4017 counter and a ULN2803 array — because LEDs love it. Two display technologies on one board demanding opposite drive strategies is part of what makes this build such a good teacher. The LED ring is Vol 4’s subject.)

3.4 The CD4511 BCD-to-seven-segment decoder/latch

So each digit needs a continuous driver that takes a digit value and lights the right segments at the right current. The part that does all of this in one 16-pin package is the CD4511 — a CMOS BCD-to-seven-segment latch/decoder/driver designed for LED displays, and very nearly perfect for a Numitron by happy coincidence.1 It does three jobs at once:

  1. Decode. It takes a 4-bit binary-coded-decimal value on inputs A, B, C, D (least-to-most significant; the schematic labels them IA–ID) and decodes it into the seven-segment pattern on outputs a–g.
  2. Latch. A built-in transparent latch holds the last value. The Latch-Enable (LE) input controls it: when LE is low the latch is transparent and the outputs follow the BCD inputs; when LE is taken high the displayed digit is frozen, and the BCD inputs can change without disturbing it. This latch is the feature that makes the shared-bus architecture of Section 3.5 possible.
  3. Drive. Its outputs are rated to source about 25 mA each — which, by the coincidence this whole volume turns on, is just enough to push the IV-9’s ~23 mA segment current directly into the filament, with no buffer transistor in between.1

Two more control inputs matter for a clock:

  • Lamp Test (LT), active-low: pull it low and all seven segments turn on regardless of the BCD value. The worked clock uses this for the startup flash — every tube lights every segment for one second at power-up and after a reset, which both looks deliberate and doubles as a free test that no segment or driver is dead.1
  • Blanking Input (BI), active-low: pull it low and all segments turn off. Useful for leading-zero suppression or a blink, and held inactive (high) in normal running.

3.4.1 The BCD-to-seven-segment truth table

The CD4511’s decode for digits 0–9 is below (1 = segment lit). Two entries carry the chip’s signature quirk: it draws a “tail-6” (segment a off) and a “tail-9” (segment d off) — the classic 4511 representation, slightly different from the fully-squared digits some later decoders produce. Inputs 1010–1111 (decimal 10–15) blank all segments.

Table 1 — 3.4.1 The BCD-to-seven-segment truth table

DCBAabcdefgShows
000011111100
000101100001
001011011012
001111110013
010001100114
010110110115
011000111116 (tail-6)
011111100007
100011111118
100111100119 (tail-9)

With LT low this whole table is overridden and a–g are all 1 (the lamp-test flash); with BI low they are all 0 (blank).

3.4.2 Mapping CD4511 outputs to IV-9 segment pins

The decoder speaks in segment letters; the tube is wired in pin numbers. The IV-9 pinout from the construction manual is 1 = common, 2 = right-hand decimal point, 3 = b, 4 = c, 5 = a, 6 = f, 7 = g, 8 = d, 9 = e — note that the segment letters are not in pin order, so the board layout deliberately routes each CD4511 output to the right (scattered) tube pin.2 On a standard 16-pin CD4511 the segment outputs sit at pins 13(a), 12(b), 11(c), 10(d), 9(e), 15(f), 14(g). Combining the two gives the wiring the worked board implements:

Table 2 — implements

SegmentCD4511 output pinIV-9 tube pin
a135
b123
c114
d108
e99
f156
g147

The IV-9’s common (pin 1) returns to the shared low side of the supply; the right-hand decimal-point filament (pin 2) is unused in this clock. Because the filament is non-polar, the topology used here — CD4511 outputs sourcing current down into the segments, out through the common to the return rail — is a choice, not a requirement; it is simply the natural fit for a CMOS decoder whose outputs idle low and pull high to light a segment. (More on topology freedom in Section 3.8.)

Figure 3 — 3 — CD4511 pin mapping: BCD inputs IA-ID plus LT, BI and LE on the left, segment outputs a-g (pins 13,12,11,10,9,15,14) on the right, each routed to its scattered IV-9 tube pin (a to 5, b …
Figure 3 — 3 — CD4511 pin mapping: BCD inputs IA-ID plus LT, BI and LE on the left, segment outputs a-g (pins 13,12,11,10,9,15,14) on the right, each routed to its scattered IV-9 tube pin (a to 5, b to 3, c to 4, d to 8, e to 9, f to 6, g to 7). Diagram: project original.

3.5 One CD4511 per tube, and the 74HC164 shift-register fan-out

Section 3.3 forces one continuous driver per digit, so the clock carries six CD4511s, one tucked behind each tube (the SMD package was chosen precisely so the tube can sit snugly atop its decoder for a clean look). That solves the drive problem but seems to create an addressing problem: six decoders × four BCD inputs would be 24 microcontroller pins just to feed digit values — and the PIC, already busy running the LED ring and the timebase, has nowhere near that to spare.1

The escape is the latch built into every CD4511 (Section 3.4) plus one SN74HC164 8-bit serial-in / parallel-out shift register acting as a digit-selector. The scheme:

  • The 4-bit BCD bus is shared. Inputs A–D of all six CD4511s are wired in parallel to four PIC port pins. At any instant the same digit value is presented to every decoder.
  • Only one decoder is told to listen. Each CD4511’s Latch-Enable is driven by one output (QA–QH) of the 74HC164. The PIC shifts a single select bit through the register so that exactly one CD4511 has its latch transparent while the other five stay frozen on the values they are already showing.
  • Update one digit, then re-freeze. The PIC puts the desired digit on the shared bus, selects the target tube via the shift register so that one CD4511 captures the value, then de-selects it so the value is latched and held. The other five tubes never flicker — their latches were closed the whole time.1
  • One digit per second is plenty. Because the time only changes once a second, the firmware updates just one Numitron digit per tick (interleaved with the LED-ring refresh). That is “much faster than actually required,” in the designer’s words, and it keeps the software simple — the synchronisation of data onto the bus and the select pulse through the shift register is all handled in code.1

The pin economy is the payoff. Instead of 24 pins for six decoders, the PIC spends roughly four BCD lines plus two shift-register control lines (serial data + clock) — about six pins — to address all six digits. That is the same fan-out idea used on the LED side, where a CD4017 decade counter sequences the rows; here a shift register sequences the latches. It is the elegant heart of the design: the per-digit continuous drive that filaments demand, delivered without a per-digit control cost.

Figure 4 — 4 — Shared-bus fan-out: the PIC's 4-bit BCD bus runs to A-D of all six CD4511s in parallel, while the 74HC164 (fed serial data + clock from the PIC) drives one Latch-Enable per tube so tha…
Figure 4 — 4 — Shared-bus fan-out: the PIC's 4-bit BCD bus runs to A-D of all six CD4511s in parallel, while the 74HC164 (fed serial data + clock from the PIC) drives one Latch-Enable per tube so that exactly one decoder's latch is transparent and only the selected tube updates. Diagram: project original.

3.6 Current limiting and the supply budget

Now the arithmetic that sizes the power supply (the full supply design is Vol 5; the demand it must meet is set here). The worst moment for the whole clock is the startup lamp-test flash, when every segment of every tube is lit at once:

I_total = (number of tubes) × (segments per tube) × (segment current)
        = 6 × 7 × 23 mA
        = 966 mA

— and the power delivered to the display alone at that instant is

P_display = 966 mA × 5 V ≈ 4.83 W

So the peak display draw is 966 mA, perilously close to a 1 A limit.1 That single number drives the whole supply specification: the worked clock targets a wall-wart and buck converter rated for at least 1.5 A (at a minimum of ~9 V input), giving comfortable headroom over the 966 mA flash plus the LED ring, the PIC, and the logic. Sizing only for the average draw — a typical time display lights perhaps half the segments — would leave the supply browning out for one second at every power-up and reset, exactly when the user is watching. Always budget a Numitron supply for the all-segments-lit case.

On current limiting at the segment level: there isn’t any, and that is deliberate. The CD4511 sources the ~23 mA segment current directly, with the filament as its load; the chip’s own output impedance sets the operating current near the part’s 25 mA rating, so the design relies on the decoder’s output characteristic rather than an external resistor. A small series element per segment is optional — it would trade a little brightness for a firmer current ceiling and a softer inrush — but the worked build omits it (the only resistors near the tubes are R14/R15, specified as 0 Ω jumpers). The supply margin and the CD4511’s self-limiting output together do the job that a discrete current-limiting resistor would do in an LED display.

3.7 Brightness and dimming — the D2 + JP2 trick

The clock includes one optional, almost charmingly simple, brightness control: a single rectifier diode, D2 (a 1N4001), in series with the tubes’ shared return, with a two-pin jumper JP2 wired to short it out.3 The mechanism is nothing more than the diode’s forward voltage drop, about 0.7 V. With JP2 open the segment current must flow through D2, so the voltage actually across each filament falls from the full rail to

V_seg = 5 V − 0.7 V ≈ 4.3 V

To first order (treating the segment as the 217 Ω hot resistance) that lowers the segment current to

I_seg ≈ 4.3 V / 217 Ω ≈ 19.8 mA   (down from ~23 mA, ≈14% less)

and the per-segment power to about

P_seg ≈ 4.3 V × 19.8 mA ≈ 85 mW   (down from ~115 mW)

In reality the dimming is a touch gentler than that arithmetic suggests, because a cooler filament has a lower resistance (Section 3.2), which claws back a little current — the filament’s positive temperature coefficient makes the operating point partially self-stabilising. The visible result is a slightly dimmer, warmer glow. Across the whole display the flash-current budget of Section 3.6 also eases, from 966 mA toward roughly

6 × 7 × 19.8 mA ≈ 830 mA

Bridge JP2 with a jumper cap and D2 is shorted out: full 5 V, full brightness, back to 23 mA. The construction manual is explicit that the whole arrangement is optional — D2 and JP2 can be left off the board entirely and a plain jumper wire fitted in the diode’s place, which is electrically identical to fitting both and capping the jumper.3 It is a “rudimentary” dimmer by the designer’s own description, but it is a neat illustration of the resistive-filament model: you dim a Numitron by lowering its segment voltage, and one ordinary diode in the common return dims all six tubes at once.

3.8 Polarity freedom and the choice of topology

Vol 2 established that a Numitron filament is non-polar — common positive, common negative, even AC, all light the segment identically. The driver consequence is that the topology is flexible: you could equally build a decoder that sinks segment current from a positive common, or sources it into a grounded common. The worked clock uses the sourcing arrangement of Section 3.4.2 — CD4511 outputs idle low and pull up to ~5 V to light a segment, with the tube commons returning to the low side (through the optional D2) — because that is the natural match for a CMOS BCD-to-seven-segment decoder built for common-cathode LED displays, where a high output lights a segment. The filament does not care; the decoder does, and the CD4511’s polarity is what fixes the topology of this build.

That is the whole driver: a resistive seven-element load that cannot be multiplexed, fed by one CD4511 per tube sourcing ~23 mA per segment directly, with six decoders addressed through a shift register on a shared BCD bus, a supply sized for the ~966 mA all-lit flash, and an optional diode to take the edge off the brightness. With the display understood, Vol 4 turns to the brain behind it — the PIC16F876A, its 4 MHz and 32 kHz crystals, the timer/interrupt structure that produces a once-a-second tick, and the multiplexed LED ring that shares the board.

3.9 References (Vol 3)

  • Bill van Dijk, “Build the Numitron — A Six-Digit Clock,” Nuts & Volts, September 2016 — build article, construction manual, full schematic, parts list (D2 = 1N4001; IC5–10 = CD4511BNSR; IC4 = SN74HC164N; R14/R15 = 0 Ω jumpers). Held in 02-inputs/TheNumetron/.
  • Cross-references: Vol 1 (overview and the no-multiplex gotcha), Vol 2 (filament incandescence and polarity freedom), Vol 4 (the PIC timebase and the multiplexed LED ring), Vol 5 (the power supply and full worked build), Vol 9 (filament lifetime and derating).

Footnotes

  1. Bill van Dijk, “Build the Numitron — A Six-Digit Clock,” Nuts & Volts, September 2016, sections “The Numitrons” and “The Power Supply.” Key claims grounded here: Numitrons “are essentially just little multi-filament incandescent light bulbs … multiplexing them will simply act as a light dimmer,” and “a 1x6 (or even a 2x3) multiplexing arrangement would leave them very dim”; the IV-9 is “a seven-segment device operating at about five volts” at “about 23 mA per segment,” driven by “a standard BCD to seven-segment decoder designed for seven-segment LED displays with a max driving output of 25 mA. The CD4511 also has a data latch built in, so it was chosen for this design”; the 74164 shift register selects which CD4511 latches on a shared BCD bus, “synchronization of data and latch selection is controlled in software,” and “only one Numitron digit is updated for each time the LED circle is updated”; the lamp-test “is used to flash all segments during startup and for reset”; and “7x6 segments at about 23 mA = 966 mA total … peaks therefore very close to the one amp limit … Be sure the wall wart can supply at least 1.5 amps.” Held in 02-inputs/TheNumetron/. 2 3 4 5 6 7 8 9

  2. IV-9 (ИВ-9) Numitron datasheet, held in 02-inputs/TheNumetron/IV-9 (Numitron).pdf; 5 V / ~23 mA-per-segment operating point per the Nuts & Volts build article. Pin/segment map per the construction manual (02-inputs/TheNumetron/_extracted/construction_manual.txt): 1 = common, 2 = right-hand decimal point, 3 = b, 4 = c, 5 = a, 6 = f, 7 = g, 8 = d, 9 = e. CD4511 output-pin and BCD/control-pin assignments (IA–ID, LT, BI, LE inputs; a–g outputs at pins 13/12/11/10/9/15/14) confirmed in the full schematic dump (02-inputs/TheNumetron/_extracted/full_schematic.txt). 2

  3. Bill van Dijk, construction manual and build article (held in 02-inputs/TheNumetron/): “D2 and the two-pin jumper JP2 may also be eliminated if you wish, and the diode replaced by a simple jumper wire. … With the jumper cap left off, the Numitrons will be slightly dimmer (due to the forward voltage drop of the diode).” D2 is a 1N4001 per the parts list (~0.7 V forward drop). The ~14% current reduction and self-stabilising note are engineering analysis from the resistive-filament model of Section 3.1–3.2. 2